10 #ifndef EIGEN_CXX11_TENSOR_TENSOR_INTDIV_H
11 #define EIGEN_CXX11_TENSOR_TENSOR_INTDIV_H
38 #ifdef EIGEN_GPU_COMPILE_PHASE
40 #elif defined(SYCL_DEVICE_ONLY)
41 return cl::sycl::clz(val);
44 _BitScanReverse(&index, val);
48 return __builtin_clz(
static_cast<uint32_t>(val));
56 #ifdef EIGEN_GPU_COMPILE_PHASE
58 #elif defined(SYCL_DEVICE_ONLY)
59 return static_cast<int>(cl::sycl::clz(val));
60 #elif EIGEN_COMP_MSVC && EIGEN_ARCH_x86_64
62 _BitScanReverse64(&index, val);
66 unsigned int lo = (
unsigned int)(val&0xffffffff);
67 unsigned int hi = (
unsigned int)((val>>32)&0xffffffff);
70 n = 32 + count_leading_zeros<unsigned int>(lo);
72 n = count_leading_zeros<unsigned int>(hi);
76 return __builtin_clzll(
static_cast<uint64_t>(val));
81 struct UnsignedTraits {
86 struct DividerTraits {
87 typedef typename UnsignedTraits<T>::type type;
88 static constexpr
int N =
sizeof(
T) * 8;
93 #if defined(EIGEN_GPU_COMPILE_PHASE)
94 return __umulhi(
a,
b);
95 #elif defined(SYCL_DEVICE_ONLY)
96 return cl::sycl::mul_hi(
a,
static_cast<uint32_t>(
b));
102 template <
typename T>
104 #if defined(EIGEN_GPU_COMPILE_PHASE)
105 return __umul64hi(
a,
b);
106 #elif defined(SYCL_DEVICE_ONLY)
107 return cl::sycl::mul_hi(
a,
static_cast<uint64_t>(
b));
108 #elif EIGEN_HAS_BUILTIN_INT128
109 __uint128_t
v =
static_cast<__uint128_t
>(
a) *
static_cast<__uint128_t
>(
b);
112 return (TensorUInt128<static_val<0>,
uint64_t>(
a) * TensorUInt128<static_val<0>,
uint64_t>(
b)).upper();
116 template <
int N,
typename T>
117 struct DividerHelper {
120 return static_cast<uint32_t>((
static_cast<uint64_t>(1) << (N+log_div)) / divider - (
static_cast<uint64_t>(1) << N) + 1);
124 template <
typename T>
125 struct DividerHelper<64,
T> {
127 #if EIGEN_HAS_BUILTIN_INT128 && !defined(EIGEN_GPU_COMPILE_PHASE) && !defined(SYCL_DEVICE_ONLY)
128 return static_cast<uint64_t>((
static_cast<__uint128_t
>(1) << (64+log_div)) /
static_cast<__uint128_t
>(divider) - (
static_cast<__uint128_t
>(1) << 64) + 1);
130 const uint64_t shift = 1ULL << log_div;
131 TensorUInt128<uint64_t, uint64_t> result = TensorUInt128<uint64_t, static_val<0> >(shift, 0) / TensorUInt128<static_val<0>,
uint64_t>(divider)
132 - TensorUInt128<static_val<1>, static_val<0> >(1, 0)
133 + TensorUInt128<static_val<0>, static_val<1> >(1);
134 return static_cast<uint64_t>(result);
139 template <
typename T,
bool div_gt_one = false>
140 struct TensorIntDivisor {
152 const int N = DividerTraits<T>::N;
153 eigen_assert(
static_cast<typename UnsignedTraits<T>::type
>(divider) < NumTraits<UnsignedType>::highest()/2);
158 int log_div = N - leading_zeros;
160 if ((
static_cast<typename UnsignedTraits<T>::type
>(1) << (log_div-1)) ==
static_cast<typename UnsignedTraits<T>::type
>(divider))
163 multiplier = DividerHelper<N, T>::computeMultiplier(log_div, divider);
164 shift1 = log_div > 1 ? 1 : log_div;
165 shift2 = log_div > 1 ? log_div-1 : 0;
171 eigen_assert(
static_cast<typename UnsignedTraits<T>::type
>(numerator) < NumTraits<UnsignedType>::highest()/2);
174 UnsignedType t1 =
muluh(multiplier, numerator);
175 UnsignedType t = (
static_cast<UnsignedType
>(numerator) - t1) >> shift1;
176 return (t1 + t) >> shift2;
180 typedef typename DividerTraits<T>::type UnsignedType;
181 UnsignedType multiplier;
191 class TensorIntDivisor<
int32_t, true> {
204 #ifdef EIGEN_GPU_COMPILE_PHASE
205 return (__umulhi(magic, n) >> shift);
206 #elif defined(SYCL_DEVICE_ONLY)
207 return (cl::sycl::mul_hi(magic,
static_cast<uint32_t>(n)) >> shift);
210 return (
static_cast<uint32_t>(v >> 32) >> shift);
218 const unsigned two31 = 0x80000000;
220 unsigned t = two31 + (ad >> 31);
221 unsigned anc = t - 1 - t%ad;
223 unsigned q1 = two31/anc;
224 unsigned r1 = two31 - q1*anc;
225 unsigned q2 = two31/ad;
226 unsigned r2 = two31 - q2*ad;
241 }
while (q1 < delta || (q1 == delta && r1 == 0));
243 magic = (unsigned)(q2 + 1);
252 template <
typename T,
bool div_gt_one>
254 return divisor.divide(numerator);
Array< int, Dynamic, 1 > v
#define EIGEN_ALWAYS_INLINE
#define EIGEN_DEVICE_FUNC
#define EIGEN_STATIC_ASSERT(X, MSG)
T operator/(const T &numerator, const TensorIntDivisor< T, div_gt_one > &divisor)
EIGEN_ALWAYS_INLINE uint32_t muluh(const uint32_t a, const T b)
EIGEN_ALWAYS_INLINE std::enable_if_t< sizeof(T)==4, int > count_leading_zeros(const T val)
: TensorContractionSycl.h, provides various tensor contraction kernel for SYCL backend